This class is oriented to the advanced Assembler language programmer that includes updated information relating to features with HLASM and the changes introduced with z/OS. Specific topics will focus on 64-bit virtual storage addressing and the programming changes required to exploit new z/OS features. New macros and data structures inherent in the z/OS architecture will be explored. In addition, the discussion will include topics that relate to managing communication between programs in different modal states

Mainframe Training Audience

This class is intended for experienced assembler language programmers that have a good understanding of basic OS/390 architecture.

Mainframe Training Course duration

5 days

Mainframe Training Course outline

Overview of OS/390 31-bit architecture Modal instructions and addressing modes AMODE vs RMODE Using storage above the 16 MB line Assembler coding considerations for 31-bit addressing Assembler coding considerations for coexistence with 24-bit programs Data management considerations for 24/31 bit programs New z/architecture instructions

Session Content

Overview of z/OS architecture 64-bit changes PSW Registers Addressing Virtual address translation z/series instruction set Instruction set overview New instructions for z/series processors Quad word alignment 64-bit register usage Modal instructions and addressing modes Mode switching Modal instructions that depend on addressing modes Mode switching branch instructions z/series support features in HLASM New data types and constants New options and statements Assembler services 64-bit virtual storage allocation services: IARV64. Residency and access modes of programs Macros that support 64-bit addresses Assembler coding considerations for 64-bit addressing Establishing base registers in 64-bit mode Coexistence considerations for 31-bit, 24-bit programs Using storage above the 2 GB bar Understanding memory objects Creating, using, and freeing memory objects Protecting storage about the 2GB bar